Imaging apparatus and image processing method

ABSTRACT

Disclosed is an imaging apparatus capable of, when a JPEG compression encoding is performed by dividing an image after an image processing into a plurality of blocks, simply performing the JPEG compression encoding and a combination of images after the encoding without encoding efficiency deterioration or a limitation in an image size of the block. The imaging apparatus includes an image processor for horizontally dividing image data into a plurality of blocks and supplying the blocks to an encoder without passing through a storage unit, the encoder for simultaneously storing an initiation address of a corresponding line to be encoded in a corresponding block and a data length after the corresponding line is encoded in the storage unit, and storing information used for a predictive encoding in the storage unit in every corresponding line to be encoded in the corresponding block.

PRIORITY

This application claims priority under 35 U.S.C. §119(a) to JapaneseApplication Serial No. 2011-275001, which was filed in the JapanesePatent Office on Dec. 15, 2011, the entire content of which is herebyincorporated by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to digital image processing, andmore particularly, to an imaging apparatus and an imaging processingmethod capable of quickly performing digital image processing.

2. Description of the Related Art

An image compression encoding in a JPEG mode processes one entire screenas one unit. On the other hand, one image can be divided into aplurality of blocks in a vertical direction and the divided blocks areprocessed in order to save capacities of a line memory, within a LargeScale Integration (LSI) circuit installed in a digital still camera andthe like.

Accordingly, in order to process one entire image and then make theimage be in a JPEG compressible state, it is required to stop aprocessing for all blocks and record a result of the processing in anexternal memory such as an SDRAM and the like to combine the blocks andthe result of the processing. Further, a JPEG compression encoder forJPEG compression reads an image configured in an external memory toexecute a compression encoding. To this end, the JPEG compression in adigital still camera is performed through a process of recording oneimage in an external memory, such as an SDRAM, at all times and alsoreading the image from the corresponding external memory.

In many cases, a speed capability of a conventional digital still camerais determined by a speed capability of an imaging apparatus. Further,the speed capability of the digital still camera requires only acontinuous shooting capability in a degree of three frames to sevenframes per second. However, the imaging apparatus currently has a highcapability, and there is a trend towards using a resolution of 12 to 20megapixels or more. Further, the speed capability currently requires acontinuous shooting capability in a degree of 10 to 15 frames persecond, and a processing capability required for the digital stillcamera becomes much higher in comparison with the conventional camera.

For this reason, when reading from and writing to the external memory ofthe image apparatus are repeatedly performed for the JPEG compressionencoding of the image, power consumption increases and costs alsoincrease due to an increase in the number of mounted external memoriesfor resolving a low speed problem according to an increase in thereading and writing. Accordingly, it is typically required to executethe JPEG compression encoding of the image without performing thereading from and the writing to the external memory as much as possible.

In order to execute the JPEG compression encoding of the image withoutthe use of the external memory as much as possible, there is a method ofexecuting the JPEG compression encoding for each of a plurality ofblocks vertically divided from one image and combining the blocks inperforming a record in a recording medium. Accordingly, the number ofaccesses to the external memory is reduced. For example, Japanese PatentApplication No. 2002-354364 discloses executing the JPEG compressionencoding for each of the plurality of blocks vertically divided from oneimage. The JPEG compression encoding is performed by adding a Restart(RST) marker code to each of the divided blocks and an image combinationafter the compression. However, differential encoding is not used in aboundary of the divided blocks, so that encoding efficiency is low andthere is a limitation in an image size of the divided block.

FIG. 1 illustrates the technology, disclosed in Japanese PatentApplication No. 2002-354364, of adding a Restart Marker code (RST) toeach of a plurality of blocks vertically divided from one image in orderto reduce the number of accesses to an external memory in a JointPhotographic Expert Group (JPEG) compression encoding.

The JPEG compression encoding does not have to be performed for oneentire image but can be performed after separating parts of the image bythe RST maker codes. FIG. 1 illustrates compression encoding performedby dividing one image into four blocks (tile 0, tile 1, tile 2, and tile3) and adding the RST marker code to a rightmost side of an MCU line ofeach block. When one image is divided into a plurality of blocks, theRST marker code is added to an end of the Minimum Coded Unit (MCU) lineof each block and then encoding is performed.

However, when the encoding is performed as described above, a datastoring direction becomes a direction in units of blocks, and does notcorrespond to “tile 0→tile 1→tile 2→tile 3. Accordingly, in order tostore the image data after the encoding, rearrangement according to anorder of an MCU line in an uppermost row of tile 0→an MCU line in anuppermost row of tile 1→ . . . is required.

Since a variable length encoding is used in JPEG encoding, a code amountfor each pixel or MCU is not consistent, and the encoding is notperformed in units of bytes. However, since the RST marker code isneeded to be in a byte boundary, each MCU row becomes the byte unit, andthus handling in the external memory is simple.

However, this method of performing a compression by adding the RSTmarker code has the following problems.

First, when compression is performed by adding the RST marker code,encoding efficiency deteriorates. In JPEG, encoding is performed bytaking a differential to perform a Direct Current (DC) prediction basedon information on the block in a left side. When the image is dividedinto a plurality of blocks and the blocks are separated by the RSTmarker code, the differential is reset in units of blocks, so that aconfiguration is simple. However, the number of RST marker codescorresponding to the division is required to be added and encodingefficiency deteriorates since the differential encoding cannot be usedbetween blocks.

FIG. 2 illustrates a case where differential encoding is not usedbetween blocks in the prior art. As illustrated in FIG. 2, encoding canbe performed between MCUs in the same block by performing a DCprediction. However, since differential encoding cannot be used betweendifferent blocks, encoding efficiency deteriorates in a part escapingfrom the corresponding block.

Subsequently, there is a limitation in an image size in the compressionperformed by adding the RST marker code. The image size between RSTmarker codes is required to be uniform. In general, since thecompression is performed in units of 16 vertical pixels based on aluminance component in the JPEG image of the digital still camera, eachblock must be in units of 16 pixels. For example, when there is aconfiguration of vertically dividing an image into four blocks, an imagesize can be changed only in units of 64 pixels.

However, although a block size becomes smaller, such as 256 horizontalpixels or 512 horizontal pixels, an entire image becomes larger, such as5000 to 8000 pixels. Accordingly, when an image is processed by dividingthe image into, for example, 32 blocks, an image size is changed only inunits of 256 pixels.

However, such a suitable imaging device is by no means common, and blackdata may be inserted into a right side of an indivisible part of theimage. FIG. 3 illustrates an example of the above case. When the imagesize is 7952 pixels in a horizontal direction, and a width of each blockis 256 pixels, only 16 pixels are actual image data in a rightmostblock. If the black data is not inserted into the remaining pixels, thepixels cannot be processed as a block.

SUMMARY OF THE INVENTION

The present invention has been made to address at least the aboveproblems and/or disadvantages and to provide at least the advantagesdescribed below. Accordingly, an aspect of the present inventionprovides an imaging apparatus and an image processing method which donot use an external memory in image processing.

The present invention also provides an imaging apparatus and an imageprocessing method which simply performs, when JPEG compression encodingis performed by dividing an image after an image processing into aplurality of blocks, the JPEG compression encoding and a combination ofimages after the encoding without an encoding efficiency deteriorationand a limitation in an image size of the block.

In accordance with an aspect of the present invention, an imagingapparatus is provided. The imaging apparatus includes an image processorfor generating image data from data generated by a light input into animaging device; an encoder for encoding the image data to generateencoded image data; and a storage unit for storing the encoded imagedata, wherein the image processor horizontally divides the image datainto a plurality of blocks and supplies the blocks to the encoderwithout passing through the storage unit, and when the image data isencoded in a unit of blocks, the encoder simultaneously stores aninitiation address of a corresponding line to be encoded in acorresponding block and a data length after the corresponding line isencoded in the storage unit and stores information used for a predictiveencoding in the storage unit in every corresponding line to be encodedin the corresponding block.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other aspects, features, and advantages of the presentinvention will be more apparent from the following detailed descriptionwhen taken in conjunction with the accompanying drawings, in which:

FIGS. 1 to 3 illustrate a conventional image processing process;

FIG. 4 is a block diagram illustrating a configuration of a digitalstill camera according to an embodiment of the present invention;

FIG. 5 is a block diagram illustrating a configuration of an imagecompressor according to an embodiment of the present invention;

FIG. 6 is a flow chart illustrating an operation process of a digitalstill camera according to an embodiment of the present invention;

FIG. 7 illustrates a relation among division of image data, an encodingorder of the divided image data, and a recording order of a memory card;

FIG. 8 illustrates a combination processing of variable length encodeddata by an image compressor according to an embodiment of the presentinvention;

FIG. 9 illustrates a predictive encoding of a digital still cameraaccording to an embodiment of the present invention;

FIG. 10 illustrates an insertion of “00” bytes when the eighth number of“1” bits are consecutive in a byte boundary in a JPEG stream; and

FIGS. 11A, 11B, and 12 illustrate a process of adding an RST marker codeaccording to an embodiment of the present invention.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE PRESENT INVENTION

Hereinafter, various embodiments of the present invention will bedescribed with reference to the accompanying drawings. In the followingdescription, the same elements will be designated by the same referencenumerals although they are shown in different drawings, and duplicateddescriptions will be omitted.

According to the present invention described below, when the JPEGcompression encoding is performed by dividing an image after an imageprocessing into a plurality of blocks without passing through anexternal memory, there is no limitation in an image size of the blockand it is possible to simply perform the JPEG compression encoding and acombination of images after the compression.

First, a configuration of a digital still camera according to anembodiment of the present invention will be described. FIG. 4 is a blockdiagram illustrating the configuration of the digital still cameraaccording to an embodiment of the present invention.

The digital still camera 100 illustrated in FIG. 4 is an example of theimaging apparatus of the present invention. As illustrated in FIG. 4,the digital still camera 100 according to an embodiment of the presentinvention includes a camera unit 102, a CPU 104, a ROM 105, amultiplexer (MUX) 106, a developing unit 110, an image compressor 112, adistortion correction processor 113, a memory card 114, an LCD 116, aSynchronous Dynamic Random Access Memory Interface (SDRAM I/F) 118, andan SDRAM 120.

Although not illustrated in FIG. 4, the camera unit 102 may include azoom lens, a focusing lens, an imaging device to which color filters ina Bayer array are installed, and the like. The camera unit 102 providesa light from a subject to the imaging device which converts the light toan electrical signal, and outputs RGB image data in the Bayer array fromthe imaging device. Here, as the imaging device, a Charge Coupled Device(CCD) image sensor or a Complementary Metal Oxide Semiconductor (CMOS)image sensor may be used. The camera unit 102 transmits the RGB imagedata in the Bayer array (the RGB image data in the Bayer array outputfrom the camera unit 102 is referred to simply as “data”) generated andoutput from the camera unit 102 to the SDRAM 120 through the SDRAM I/F118 or directly transmits the generated RGB image data to themultiplexer 106.

The Central Processing Unit (CPU) 104 controls an operation of eachcomponent included in the digital still camera 100. Various programs orsetting information used for controlling the operation of the digitalstill camera 100 are stored in the ROM 105. The multiplexer 106 receivesthe data generated and output from the camera unit 102 and the imagedata stored in the SDRAM 120 and outputs the data and the image data tothe developing unit 110.

The developing unit 110 generates image data including YCbCr informationcontaining a luminance signal and a chromaticity signal by using thedata generated in the camera unit 102. In other words, the developingunit 110 executes a process corresponding to a developing process. Theimage data generated by the developing unit 110 is transferred to theimage compressor 112.

The image compressor 112 performs a predetermined image compressionprocessing on the image data generated by the developing unit 110. Asthe predetermined image compression processing, the image compressor 112compresses the image data to JPEG. Under a control of the CPU 104, theimage data compressed by the image compressor 112, that is, encodedimage data is transferred to the SDRAM 120 through the SDRAM I/F 118.

The distortion correction processor 113 simultaneously restrains powerconsumption by controlling a supply of a clock provided to the SDRAM 120and corrects a distortion of the encoded image data stored in the SDRAM120. In this way, the distortion of the encoded image data stored in theSDRAM 120 may be corrected by the distortion correction processor 113.

The memory card 114 is a storage device for storing the encoded imagedata compressed by the image compressor 112 and stored in the SDRAM 120.The encoded image data may be stored in the memory card 114 under acontrol of the CPU 104.

The Liquid Crystal Display (LCD) 116 displays various setting screens ofthe digital still camera 100, displays the data generated by the cameraunit 102 in real time (for example, in a live view type), or displaysthe image data stored in the memory card 114. Further, although thepresent embodiment uses an LCD, the present invention may use a displaydevice other than the LCD, for example, a display device using anorganic Electro-luminance (EL) display.

The SDRAM I/F 118 is an interface located between the SDRAM 120 and theabove described components. The SDRAM I/F 118 mediates the datarecording in the SDRAM 120 or the data reading from the SDRAM 120. TheSDRAM 120 is a storage device for temporarily storing the data generatedby the camera unit 102, the data developed by the developing unit 110,the image data compressed by the image compressor 112, and the like.Further, although not illustrated in FIG. 4, the digital still camera100 may further include an input unit for receiving an input control ofthe user, and the input unit may include a shutter button for executinga photographing processing or a control button for controlling thedigital still camera 100.

According to the present embodiment, when the image data is generated,the developing unit 110 directly supplies the image data to the imagecompressor 112 without passing through the SDRAM 120. Accordingly, atime required from the photographing by the camera unit 102 to thecompletion of the compression by the image compressor 112 is reduced andthus a processing speed is faster.

In the above description, the configuration of the digital still camera100 according to an embodiment of the present invention has beendiscussed with reference to FIG. 4. Hereinafter, a configuration of theimage compressor 112 included in the digital still camera 100 accordingto an embodiment of the present invention will be described.

FIG. 5 illustrates the configuration of the image compressor 112included in the digital still camera 110 according to an embodiment ofthe present invention.

As illustrated in FIG. 5, the image compressor 112 included in thedigital still camera 100 according to an embodiment of the presentinvention includes a video I/F 131, a Discrete Cosine Transform (DCT)unit 132, a quantizer 133, an Inverse Motion Compensation (IMC) unit134, a variable length encoder 135, a stream I/F 136, and a DirectMemory Access Interface (DAM I/F) 137.

The video I/F 131 receives the image data from the developing unit 110.The video I/F 131 outputs the image data input from the developing unit110 to the DCT unit 132. The DCT unit 132 performs a DCT on the imagedata input from the video I/F 131. The DCT unit 132 transmits thediscrete cosine transformed data to the quantizer 133. The quantizer 133quantizes the discrete cosine transformed data. The IMC unit 134performs an inverse motion compensation on the quantized data.

The variable length encoder 135 performs variable length encoding on theinversely motion compensated image data. The variable length encoder 135writes out a DC value of each of Y, Cb, and Cr in performing thevariable length encoding on the image data. When the DC value of each ofY, Cb, and Cr is written, the variable length encoder 135 outputsinformation on the written DC value to the DMA I/F 137 and is stored ina DC register 138. Further, when the image data is variable lengthencoded, the variable length encoder 135 transmits the encoded data tothe stream I/F 136.

The stream I/F 136 outputs the data variable length encoded by thevariable length encoder 135 as a stream. The DMA I/F 137 stores the DCvalue of each of Y, Cb, and Cr written by the variable length encoder135 in the SDRAM 120, and also reads the DC value of each of Y, Cb, andCr stored in the SDRAM 120 as necessary and transmits the read DC valueto the variable length encoder 135. In a series of processing by theimage compressor 112, an access to an SRAM (not shown) may be performedas necessary.

The image compressor 112 included in the digital still camera 100according to an embodiment of the present invention is configured asillustrated in FIG. 5. Even when one image is vertically divided, apredictive encoding is possible in a part escaping from thecorresponding block (a part bridging over the corresponding block), sothat the encoding can be completed without encoding efficiencydeterioration.

Further, the configuration of the image compressor 112 is not limited tothe above example. The image compressor 112 may be configured such thatinformation on an initiation address of each MCU row, a bit length ofeach MCU row after the encoding, and the DC value of each of Y, Cb, andCr are stored in the SDRAM 120 and accordingly, the configuration of theimage compressor 112 is not limited to as illustrated in FIG. 5.

The configuration of the image compressor 112 included in the digitalstill camera 100 according to an embodiment of the present invention hasbeen described. Subsequently, an operation of the digital still camera100 according to an embodiment of the present invention will bedescribed.

FIG. 6 is a flowchart illustrating the operation of the digital stillcamera 100 according to an embodiment of the present invention. Theflowchart in FIG. 6 shows an operation process when the digital stillcamera 100 performs the JPEG compression encoding on the image accordingto an embodiment of the present invention.

When the image data including the YCbCr information containing theluminance signal and the chromaticity signal is generated, thedeveloping unit 110 vertically divides the image data into a pluralityof blocks in step S101. Here, one divided block is referred to as a“tile”. The developing unit 110 sequentially supplies the divided imagedata directly to the image compressor 112 without passing through theSDRAM 120.

FIG. 7 illustrates a relation among division of the image data, anencoding order of the image data, and a recoding order of the memorycard. FIG. 7 illustrates a case where one image data is divided intofour tiles, such as tile 0, tile 1, tile 2, and tile 3. Further, in anexample of FIG. 7, it is assumed that one tile consists of N MCU rows.

The image compressor 112 performs the variable length encoding on theimage, which is generated by the developing unit 110 and divided into aplurality of blocks, in units of blocks in step S102. As illustrated inFIG. 7, for tile 0 corresponding to a leftmost tile, the imagecompressor 112 first performs the variable length encoding sequentiallyfrom a top. Further, when the variable length encoding on the image in alowest MCU row has been completed, the image compressor 112 equallyperforms the variable length encoding in units of MCU rows sequentiallyfrom a top, for tile 1 corresponding to a next tile.

Here, when the variable length encoding is performed on tile 0 in unitsof MCU rows sequentially from a top, the image compressor 112 recordsthe DC value of each of Y, Cb, and Cr of the MCU in a rightmost side ofthe MCU row in the SDRAM 120. As described below, as the DC value ofeach of Y, Cb, and Cr of the MCU in the rightmost side of the MCU row isrecorded in the SDRAM 120, a predictive encoding on an MCU in a leftmostside of a corresponding MCU row of an adjacent tile is possible.

When the variable length encoding on the image divided into a pluralityof blocks is performed in units of blocks, the image compressor 112records information on an initiation address of each MCU row in theSDRAM 120 in step S103, and records information on a bit amount of eachMCU row in the SDRAM 120 in step S104.

Since the image compressor 112 performs the variable length encoding onthe MCU row, a length of each MCU row after the encoding is notconsistent. Accordingly, when the data after the encoding is rearranged,combined, and recorded in the memory card 114 as illustrated in FIG. 7,it should be recognized where the data of each MCU row is. Therefore,the initiation address information of each MCU row after the encoding isrecorded in the SDRAM 120, and the initiation address information isreferred to when the data of each MCU row is recorded in the memory card114.

Further, when the data of each MCU row is recorded in the memory card114, it is necessary to know amounts of the data of each MCU row to beread and code amounts of each MCU in order to know the number ofremaining bit amounts. Accordingly, the information on the bit amount ofeach MCU row after the encoding is recorded in the SDRAM 120.

FIG. 8 illustrates a combination processing of data that has beenvariable length encoded by the image compressor 112. FIG. 8 shows anexample of a case where an MCU row in an uppermost part of tile 0 and anMCU row of an uppermost part of tile 1 are combined. Further, FIG. 8shows an example of a state where last three bits remain and the lastthree bits are filled with predetermined padding bits when the MCU rowin the uppermost part of tile 0 is variable length encoded.

In this case, an initiation address of the MCU row in the uppermost partof tile 0, information on a bit amount of each MCU row after theencoding, and information on the remaining bit amounts are stored in theSDRAM 120. Similarly, an initiation address of the MCU row in theuppermost part of tile 1, information on a bit amount of each MCU rowafter the encoding, and information on the remaining bit amounts arestored in the SDRAM 120.

In step S105, when the JPEG encoding of one image data is completed andencoded data is stored in the SDRAM 120, the encoded data stored in theSDRAM 120 is combined with one frame JPEG image by rearranging theencoded data using information stored in the SDRAM 120 in steps S103 andS104. The combined JPEG image is recorded in the memory card 114.

When the encoded data is rearranged and recorded in the memory card 114,the information stored in the SDRAM 120 is read and referred to, and adata combination is possible in units of MCU rows as illustrated in FIG.8. That is, the initiation address of the MCU row in the uppermost partof tile 0 and the information on the bit amount of each MCU row afterthe encoding are read from the SDRAM 120, and how much of the MCU row inthe uppermost part of tile 0 should be read from what part of the SDRAM120 can be known.

Continuously, by reading the initiation address of the MCU row in theuppermost part of tile 1 and the information on the bit amount of eachMCU after the encoding from the SDRAM 120, how much of the MCU row inthe uppermost part of tile 1 should be read from what part of the SDRAM120 can be known, so that the read MCU row may be connected to a back ofthe MCU row in the uppermost part of tile 0.

According to an embodiment of the present invention as described above,when the developing unit 110 generates image data including YCbCrinformation containing a luminance signal and a chromaticity signal andsupplies the image data to the image compressor 112 without passingthrough the SDRAM 120, one image is divided into a plurality of tilesand the tiles are supplied to the image compressor 112 from thedeveloping unit 110. The image compressor 112 performs a variable lengthencoding on the image data in units of tiles. In the variable lengthencoding, the initiation address information of each MCU row after theencoding, the bit length of each MCU row after the encoding, and the DCvalue of each of Y, Cb, and Cr are recorded in the SDRAM 120.

FIG. 9 illustrates a predictive encoding in the digital still camera 100according to an embodiment of the present invention. In the abovemanner, the initiation address information of each MCU row after theencoding, the bit length of each MCU row after the encoding, and the DCvalue of each of Y, Cb, and Cr are recorded in the SDRAM 120, and thepredictive encoding using the DC value of each of Y, Cb, and Cr ispossible in a boundary of tiles.

In the variable length encoding, as the initiation address informationof each MCU row after the encoding, the bit length of each MCU row afterthe encoding, and the DC value of each of Y, Cb, and Cr are recorded inthe SDRAM 120, one RST marker code has only to be located in a rightmostpart of the MCU row, so that an encoding efficiency of the variablelength encoding may be higher than that of the prior art. Further, sincethe RST marker code is not inserted into each tile, a width of each tilemay be freely set, and thus various widths of the image may be applied.

Here, a processing required for generating the JPEG image by combiningdata variable length encoded in units of tiles will be described. TheDMA I/F 137 for generating the JPEG image by combining the variablelength encoded data is required to have the following functions.

(1) Byte Alignment

The MCU row within each tile is not byte-aligned. As described above,the DMA I/F 137 reads each MCU row and needs to combine the variablelength encoded data by performing a bit shift.

(2) “00” Padding After “FF”

In a JPEG stream, when the eighth number of “1” bits are consecutive inthe byte boundary, that is, when there is “FF” in hexadecimal number ina case where the JPEG stream is viewed with screens such as an editorand the like, next bytes should be “00”. Accordingly, when the eighthnumber of “1” bits are consecutive in the byte boundary, it is requiredto add “00” bytes. However, the image compressor 112 for executing theJPEG encoding cannot know where the byte boundary is in the data whichis being encoded, so that the DMA I/F 137 which is rearranging the datais required to perform the addition of “00” bytes. FIG. 10 illustratesan insertion of “00” bytes when the eighth number of “1” bits areconsecutive in the byte boundary in the JPEG stream.

For this reason, the image compressor 112 searches for a part where theeighth number of “1” bits are consecutive in the byte boundary in thestream of the image which is encoded. When there is the part where theeighth number of “1” bits are consecutive, an address of the part isrecorded in the SDRAM 120 as a file. Further, the DMA I/F 137 forrecording the image after the JPEG encoding in the memory card 114inserts “00” bytes to the corresponding part with reference to theaddress of the part where the eighth number of “1” bits are consecutive,written in the SDRAM 120 by the image compressor 112.

FIG. 10 shows two examples. In a first example, when there is “FF”, thatis, a part where the eighth number of “1” bits are consecutive in thebyte boundary, “00” bytes are inserted after “FF”. In a second example,when there is “FF”, that is, a part where the sixteenth number of “1”bits are consecutive in the byte boundary, “00” bytes are inserted aftereach “FF”.

In the stream of the image data which is being encoded, the imagecompressor 112 searches for the part where the eighth number of “1” bitsare consecutive in the byte boundary and writes the part in the SDRAM120, and the DMA I/F 137 inserts “00” bytes with reference to theinformation. Accordingly, in this case, an effect of reducing a timespent on combining the data by the DMA I/F 137 can be expected incomparison with the case where the DMA I/F 137 searches for the data.

(3) Addition of the RST Marker Code

Since the RST marker code is needed to be recorded in a byte boundary,the DMA I/F 137 for recording the image after the JPEG encoding in thememory card 114 inserts the RST marker code. An object of the presentembodiment is to reduce the number of RST marker codes as much aspossible when the encoding is performed by dividing one image into aplurality of tiles. Meanwhile, a rightmost edge part of each MCU linedefinitely needs the RST marker code.

In the general JPEG encoding, the DC value of the MCU in the leftmostedge is predictive-encoded using information on the MCU in the rightmostedge of the upper MCU row. However, in the present embodiment, since aleft edge tile is first encoded, the information on the MCU in therightmost edge cannot be referred to. FIGS. 11A and 11B illustrate astate where information on the MCU in the rightmost edge cannot bereferred to since a tile in the left edge is first encoded. Accordingly,in the present embodiment, the digital still camera 100 horizontallyadds the RST marker codes one by one.

FIG. 12 illustrates an insertion of the RST marker code before the MCUin a left edge of a left edge tile when data is combined by the DMA I/F137 of the digital still camera 100 according to an embodiment of thepresent invention. When the data is combined by the DMA I/F 137, it ispossible to generate data suitable for a standard of the JPEG byinserting the RST marker code before the MCU in the left edge of theleft edge tile.

In an example illustrated in FIG. 12, data in a right edge part of tile3 is extracted. In the case illustrated in FIG. 12, the RST marker codemust be added after data in a right edge of tile 3 in an uppermost part.Further, in the example of FIG. 12, when the data in the rightmost edgeof tile 3 in the uppermost part lacks five bits in the byte boundary asvalid data, the five bits are filled with “0” and then the RST marker isadded when the data is combined by the DMA I/F 137. Accordingly, thedigital still camera 100 according to the present embodiment cangenerate data suitable for the standard of the JPEG.

As described above, in the digital still camera 100 according to anembodiment of the present invention, when the developing unit 110generates the image data including YCbCr information containing theluminance signal and the chromaticity signal and supplies the image datato the image compressor 112 without passing through the SDRAM 120, oneimage is divided into a plurality of blocks and then the blocks aresupplied to the image compressor 112 from the developing unit 110. Theimage compressor 112 performs the variable length encoding on the imagedata in units of tiles. In the variable length encoding, the initiationaddress information of each MCU row after the encoding, the bit lengthof each MCU row after the encoding, and the DC value of each of Y, Cb,and Cr are recorded in the SDRAM 120.

In the variable length encoding, as the initiation address informationof each MCU row after the encoding, the bit length of each MCU row afterthe encoding, and the DC value of each of Y, Cb, and Cr are recorded inthe SDRAM 120, one RST marker code has only to be located in a rightmostpart of the MCU row, so that encoding efficiency of the variable lengthencoding may be higher than that of the prior art. Further, since theRST marker code is not inserted into each tile, a width of each tile maybe freely set, and thus the present invention may be applied to anyimage having any width.

Further, when the digital still camera 100 makes one image file byperforming the variable length encoding on the image data in units oftiles and combining the encoded data, the digital still camera 100performs a bit-shift on the data and adds “00” padding and the RSTmarker code to make the data suitable for the standard of the JPEG.Accordingly, the digital still camera 100 according to an embodiment ofthe present invention is not required to temporarily store the imagedata including YCbCr information in the SDRAM 120, so that it ispossible to reduce power consumption and a capacity of the SDRAM and toobtain an image file suitable for the standard of the JPEG.

According to the present invention, in processing an image, when a JPEGcompression encoding is performed by dividing an image after imageprocessing into a plurality of blocks without passing through anexternal memory, it is possible to simply perform the JPEG compressionencoding and a combination of images after the compression withoutencoding efficiency deterioration or a limitation in an image size ofthe block.

While the embodiments of the present invention have been described indetail with reference to the accompanying drawings, the presentinvention is not limited thereto. It will be understood by those skilledin the art that various changes in form and details may be made thereinwithout departing from the spirit and scope of the present invention asdefined by the appended claims.

What is claimed is:
 1. An imaging apparatus comprising: an image processor for generating image data from data generated by a light input into an imaging device; an encoder for encoding the image data to generate encoded image data; and a storage unit for storing the encoded image data, wherein the image processor horizontally divides the image data into a plurality of blocks and supplies the blocks to the encoder without passing through the storage unit, and when the image data is encoded in units of blocks, the encoder simultaneously stores an initiation address of a corresponding line to be encoded in a corresponding block and a data length after the corresponding line is encoded in the storage unit and stores information used for a predictive encoding in the storage unit in every corresponding line to be encoded in the corresponding block.
 2. The imaging apparatus of claim 1, wherein the encoder reads the information used for the predictive encoding from the storage unit when a predictive encoding of a block adjacent to a block associated with the information is performed.
 3. The imaging apparatus of claim 1, further comprising a combiner for combining the encoded image data encoded in the units of blocks by using the encoded image data stored in the storage unit, the initiation address, and the data length after the encoding.
 4. The imaging apparatus of claim 1, wherein the encoder searches for a position of particular data in the encoded image data and stores information on the position in the storage unit.
 5. The imaging apparatus of claim 1, wherein the information used for the predictive encoding corresponds to a Direct Current (DC) value of each of Y, Cb, and Cr of a Minimum Coded Unit (MCU) in a rightmost part of the corresponding line.
 6. The imaging apparatus of claim 1, wherein, when n number of “1” bits are consecutive in a byte boundary of the encoded image data, “00” bytes are inserted after the n number of “1” bits.
 7. The imaging apparatus of claim 1, wherein a Restart (RST) marker code is inserted into a rightmost edge of the corresponding line.
 8. An image processing method by an imaging apparatus, comprising: generating image data from data generated by a light input into an imaging device; horizontally dividing the image data into a plurality of blocks; encoding the image data in units of blocks to generate encoded image data; and when the image data is encoded in the units of blocks, simultaneously storing an initiation address of a corresponding line to be encoded in a corresponding block and a data length after the corresponding line is encoded in a storage unit and storing information used for a predictive encoding in the storage unit in every line to be encoded in the corresponding block.
 9. The image processing method of claim 8, wherein the information used for the predictive encoding is read from the storage unit when the predictive encoding of a block adjacent to a block associated with the information is performed.
 10. The image processing method of claim 8, further comprising combining the encoded image data encoded in the units of blocks by using the encoded image data stored in the storage unit, the initiation address, and the data length after the encoding.
 11. The image processing method of claim 8, wherein a position of particular data in the encoded image data is searched for, and information on the position is stored in the storage unit.
 12. The image processing method of claim 8, wherein the information used for the predictive encoding corresponds to a DC value of each of Y, Cb, and Cr of an MCU in a rightmost side of the corresponding line.
 13. The image processing method of claim 8, wherein, when n number of “1” bits are consecutive in a byte boundary of the encoded image data, “00” bytes are inserted after the n number of the “1” bits.
 14. The image processing method of claim 8, wherein an RST marker code is inserted into a rightmost edge of the corresponding line. 